25 search results - page 4 / 5 » FPGA segmented channel routing using genetic algorithms |
ICES
1998
Springer
13 years 9 months ago
1998
Springer
In this paper we present a new chromosome representation for evolving digital circuits. The representation is based very closely on the chip architecture of the Xilinx 6216 FPGA. W...
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...
GECCO
2003
Springer
13 years 10 months ago
2003
Springer
Abstract. Multi-FPGA systems (MFS) are used for a great variety of applications, for instance, dynamically re-configurable hardware applications, digital circuit emulation, and num...
DAC
1995
ACM
13 years 9 months ago
1995
ACM
We propose a novel optimization scheme that can improve the routing by reducing a newly observed router decaying effect. A pair of greedy-grow algorithms, each emphasizing a diffe...
AHS
2006
IEEE
13 years 11 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...