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MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
13 years 11 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
IEEEIAS
2009
IEEE
13 years 2 months ago
Full System Simulation and Verification Framework
In this paper, we propose a framework to develop highperformance system accelerator hardware and the corresponding software at system-level. This framework is designed by integrat...
Jing-Wun Lin, Chen-Chieh Wang, Chin-Yao Chang, Chu...
CODES
2005
IEEE
13 years 10 months ago
Dynamic phase analysis for cycle-close trace generation
For embedded system development, several companies provide cross-platform development tools to aid in debugging, prototyping and optimization of programs. These are full system em...
Cristiano Pereira, Jeremy Lau, Brad Calder, Rajesh...
CODES
2004
IEEE
13 years 8 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
ICCAD
2005
IEEE
147views Hardware» more  ICCAD 2005»
14 years 1 months ago
NoCEE: energy macro-model extraction methodology for network on chip routers
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...
Jeremy Chan, Sri Parameswaran