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CASES
2007
ACM
13 years 6 months ago
Facilitating compiler optimizations through the dynamic mapping of alternate register structures
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...
Chris Zimmer, Stephen Roderick Hines, Prasad Kulka...
IPPS
2006
IEEE
13 years 10 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
13 years 10 months ago
RENO - A Rename-Based Instruction Optimizer
RENO is a modified MIPS R10000 register renamer that uses map-table “short-circuiting” to implement dynamic versions of several well-known static optimizations: move eliminat...
Vlad Petric, Tingting Sha, Amir Roth
CF
2009
ACM
13 years 11 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
PAMI
2006
202views more  PAMI 2006»
13 years 4 months ago
Pose and Motion Recovery from Feature Correspondences and a Digital Terrain Map
A novel algorithm for pose and motion estimation using corresponding features and a Digital Terrain Map is proposed. Using a Digital Terrain (or Digital Elevation) Map (DTM/DEM) as...
Ronen Lerner, Ehud Rivlin, Héctor Rotstein