25 search results - page 1 / 5 » Failure analysis of timing and IDDq-only failures from the S... |
ITC
1999
IEEE
13 years 9 months ago
1999
IEEE
SEMATECH has sponsored a "Test Method Evaluation" study to understand the trade-offs among the most common test methodologies used in the industry[1,2]. This paper prese...
BMCBI
2010
13 years 2 months ago
2010
Background: Most genomic data have ultra-high dimensions with more than 10,000 genes (probes). Regularization methods with L1 and Lp penalty have been extensively studied in survi...
ITC
1996
IEEE
13 years 9 months ago
1996
IEEE
A 25k gate Test Chip was designed and manufactured to evaluate different test methods for scan-designed circuits. The design of the chip, the experiment, and preliminary experimen...
ICST
2009
IEEE
13 years 12 months ago
2009
IEEE
Developers write and execute ad-hoc tests as they implement software. While these tests reflect important insights of the developers (e.g., which parts of the software need testi...
TR
2010
12 years 12 months ago
2010
Abstract--In the past ten years, the software aging phenomenon has been systematically researched, and recognized by both academic, and industry communities as an important obstacl...