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» Fast Inductance Extraction of Large VLSI Circuits
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IPPS
2002
IEEE
10 years 6 months ago
Fast Inductance Extraction of Large VLSI Circuits
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
Hemant Mahawar, Vivek Sarin, Weiping Shi
GLVLSI
2003
IEEE
186views VLSI» more  GLVLSI 2003»
10 years 6 months ago
A fast simulation approach for inductive effects of VLSI interconnects
Modeling on-chip inductive effects for interconnects of multigigahertz microprocessors remains challenging. SPICE simulation of these effects is very slow because of the large num...
Xiaoning Qi, Goetz Leonhardt, Daniel Flees, Xiao-D...
DAC
2002
ACM
11 years 2 months ago
A solenoidal basis method for efficient inductance extraction
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
Hemant Mahawar, Vivek Sarin, Weiping Shi
ISQED
2002
IEEE
128views Hardware» more  ISQED 2002»
10 years 6 months ago
Inductive Characteristics of Power Distribution Grids in High Speed Integrated Circuits
— The inductive characteristics of several types of gridded power distribution networks are described in this paper. The inductance extraction program FastHenry is used to evalua...
Andrey V. Mezhiba, Eby G. Friedman
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