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DAC
2006
ACM
13 years 9 months ago
Steiner network construction for timing critical nets
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
Shiyan Hu, Qiuyang Li, Jiang Hu, Peng Li
GLVLSI
1996
IEEE
125views VLSI» more  GLVLSI 1996»
13 years 10 months ago
Performance-Driven Interconnect Global Routing
In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
Dongsheng Wang, Ernest S. Kuh
ICCAD
2007
IEEE
281views Hardware» more  ICCAD 2007»
14 years 2 months ago
Archer: a history-driven global routing algorithm
Global routing is an important step in the physical design process. In this paper, we propose a new global routing algorithm Archer, which resolves some of the most common problem...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ISPD
2009
ACM
141views Hardware» more  ISPD 2009»
14 years 24 days ago
A faster approximation scheme for timing driven minimum cost layer assignment
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
Shiyan Hu, Zhuo Li, Charles J. Alpert