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» Fault Testing for Reversible Circuits
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ASPDAC
2006
ACM
144views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits
Abstract— Substantial attention is being paid to the fault diagnosis problem in recent test literature. Yet, the compaction of test vectors for fault diagnosis is little explored...
Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahas...
ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
14 years 2 months ago
A theory of Error-Rate Testing
— We have entered an era where chip yields are decreasing with scaling. A new concept called intelligible testing has been previously proposed with the goal of reversing this tre...
Shideh Shahidi, Sandeep Gupta
IAJIT
2010
150views more  IAJIT 2010»
13 years 3 months ago
Realization of a Novel Fault Tolerant Reversible Full Adder Circuit in Nanotechnology
: In parity preserving reversible circuit, the parity of the input vector must match the parity of the output vector. It renders a wide class of circuit faults readily detectable a...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
ET
2010
122views more  ET 2010»
13 years 2 months ago
Fault Models for Quantum Mechanical Switching Networks
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...
Jacob D. Biamonte, Jeff S. Allen, Marek A. Perkows...
VTS
1997
IEEE
86views Hardware» more  VTS 1997»
13 years 9 months ago
Methods to reduce test application time for accumulator-based self-test
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
Albrecht P. Stroele, Frank Mayer