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VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
14 years 5 months ago
Multiple Faults: Modeling, Simulation and Test
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Salu...
IOLTS
2008
IEEE
116views Hardware» more  IOLTS 2008»
13 years 11 months ago
SystemC-Based Minimum Intrusive Fault Injection Technique with Improved Fault Representation
In this paper, we propose a new SystemC-based fault injection technique that has improved fault representation in visible and on-the-fly data and signal registers. The technique ...
Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-H...
IPPS
2003
IEEE
13 years 10 months ago
A Low Cost Fault Tolerant Packet Routing for Parallel Computers
This work presents a new switching mechanism to tolerate arbitrary faults in interconnection networks with a negligible implementation cost. Although our routing technique can be ...
Valentin Puente, José A. Gregorio, Ram&oacu...
VLSID
2003
IEEE
82views VLSI» more  VLSID 2003»
14 years 5 months ago
SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs
We propose a non-intrusive methodology for concurrent fault detection in FSMs. The proposed method is similar to duplication, wherein a replica of the circuit acts as a predictor ...
Petros Drineas, Yiorgos Makris
ISQED
2003
IEEE
134views Hardware» more  ISQED 2003»
13 years 10 months ago
Concurrent Fault Detection in Random Combinational Logic
We discuss a non-intrusive methodology for concurrent fault detection in random combinational logic. The proposed method is similar to duplication, wherein a replica of the circui...
Petros Drineas, Yiorgos Makris