10 search results - page 1 / 2 » Fault-Tolerant Distributed Clock Generation in VLSI Systems-... |
DFT
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper we will introduce a novel approach for the on-chip generation of a faulttolerant clock. We will motivate why it becomes more and more desirable to provide VLSI circu...
EDCC
2006
Springer
13 years 7 months ago
2006
Springer
EDCC
2010
Springer
13 years 10 months ago
2010
Springer
ISVLSI
2002
IEEE
13 years 10 months ago
2002
IEEE
The clock distribution and generation circuitry is known to consume more than a quarter of the power budget of existing microprocessors. A previously derived clock energy model is...
DAC
2001
ACM
14 years 6 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...