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» Feedback Output Queuing: A Novel Architecture for Efficient ...
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DATE
2008
IEEE
99views Hardware» more  DATE 2008»
13 years 11 months ago
GMDS: Hardware implementation of novel real output queuing architecture
In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose lin...
R. Arteaga, Félix Tobajas, Roberto Esper-Ch...
VLSID
2005
IEEE
170views VLSI» more  VLSID 2005»
13 years 10 months ago
A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications
Abstract—Integrated power supplies are critical building blocks in stateof-the-art portable applications, where they efficiently and accurately transform a battery supply into va...
Biranchinath Sahu, Gabriel A. Rincón-Mora
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 5 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
ICMCS
2006
IEEE
143views Multimedia» more  ICMCS 2006»
13 years 10 months ago
Object Recognition and Recovery by Skeleton Graph Matching
This paper presents a robust and efficient skeleton-based graph matching method for object recognition and recovery applications. The novel feature is to unify both object recogni...
Lei He, Chia Y. Han, William G. Wee