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ASPDAC
2005
ACM
122views Hardware» more  ASPDAC 2005»
13 years 6 months ago
Block based statistical timing analysis with extended canonical timing model
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
ASPDAC
2007
ACM
92views Hardware» more  ASPDAC 2007»
13 years 8 months ago
New Block-Based Statistical Timing Analysis Approaches Without Moment Matching
With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Ma...
Ruiming Chen, Hai Zhou
DAC
2005
ACM
14 years 5 months ago
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...
ICCAD
2005
IEEE
133views Hardware» more  ICCAD 2005»
14 years 1 months ago
Gate sizing using incremental parameterized statistical timing analysis
— As technology scales into the sub-90nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as sta...
Matthew R. Guthaus, Natesan Venkateswaran, Chandu ...
DAC
2004
ACM
14 years 5 months ago
First-order incremental block-based statistical timing analysis
Chandramouli Visweswariah, K. Ravindran, K. Kalafa...