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JSSPP
1995
Springer
13 years 8 months ago
A Microeconomic Scheduler for Parallel Computers
We describe a scheduler based on the microeconomic paradigm for scheduling on-line a set of parallel jobs in a multiprocessor system. In addition to increasing the system throughpu...
Ion Stoica, Hussein M. Abdel-Wahab, Alex Pothen
IPPS
2010
IEEE
13 years 3 months ago
Fine-grained QoS scheduling for PCM-based main memory systems
With wide adoption of chip multiprocessors (CMPs) in modern computers, there is an increasing demand for large capacity main memory systems. The emerging PCM (Phase Change Memory) ...
Ping Zhou, Yu Du, Youtao Zhang, Jun Yang 0002
DAC
1997
ACM
13 years 9 months ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
ASPLOS
2008
ACM
13 years 7 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
QUESTA
2006
73views more  QUESTA 2006»
13 years 5 months ago
Handling load with less stress
Abstract We study how the average performance of a system degrades as the load nears its peak capacity. We restrict our attention to the performance measures of average sojourn tim...
Nikhil Bansal, David Gamarnik