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ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
10 years 5 months ago
Flexible Low Power Probability Density Estimation Unit For Speech Recognition
— This paper describes the hardware architecture for a flexible probability density estimation unit to be used in a Large Vocabulary Speech Recognition System, and targeted for m...
Ullas Pazhayaveetil, Dhruba Chandra, Paul Franzon
DAC
2005
ACM
11 years 17 days ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
CODES
2004
IEEE
10 years 3 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
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