32 search results - page 2 / 7 » Floorplan-aware automated synthesis of bus-based communicati... |
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
System-on-Chip (SoC) design methodologies rely heavily on reuse of intellectual property (IP) blocks. IP reuse is a labour intensive and time consuming process as IP blocks often ...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
In this paper we propose a new communication synthesis approach targeting systems with sequential communication media (SCM). Since SCMs require that the reading sequence and writi...
DAC
2002
ACM
14 years 5 months ago
2002
ACM
Constraint-driven Communication Synthesis enables the automatic design of the communication architecture of a complex system from a library of pre-defined Intellectual Property (I...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
A simple protocol for latency-insensitive design is presented. The main features of the protocol are the efficient implementation of elastic communication channels and the automat...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...