3 search results - page 1 / 1 » Formal verification of analog circuits in the presence of no... |
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
We model and verify analog designs in the presence of noise and process variation using an automated theorem prover, MetiTarski. Due to the statistical nature of noise, we propose ...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
FDL
2007
IEEE
13 years 8 months ago
2007
IEEE
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...