Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
With the increasing complexity of today's embedded systems, there is a need to formally verify such designs at mixed abstraction levels. This is needed if some compoe describ...
The continuous requirements of evolving a delivered software system and the rising cost of shutting down a running software system are forcing researchers and practitioners to fin...
Junrong Shen, Xi Sun, Gang Huang, Wenpin Jiao, Yan...
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Abstract. Explicit behavioural interface description languages (BIDLs, protocols) are now recognized as a mandatory feature of component languages in order to address component reu...