53 search results - page 11 / 11 » From Equation to VHDL: Using Rewriting Logic for Automated F... |
FPL
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
IJES
2006
13 years 5 months ago
2006
Embedded real-time systems must satisfy not only logical functional requirements but also para-functional properties such as timeliness, Quality of Service (QoS) and reliability. W...
JISBD
2001
13 years 6 months ago
2001
Existing tools intended to build and deploy engaging complex Web sites (including functionality) have shown to be inadequate to face the software production process in an unified a...