26 search results - page 2 / 6 » Full-Chip Multilevel Routing for Power and Signal Integrity |
SLIP
2005
ACM
13 years 11 months ago
2005
ACM
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...
ISPD
2009
ACM
14 years 3 days ago
2009
ACM
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
ICCD
2001
IEEE
14 years 2 months ago
2001
IEEE
The formiila-based I<,JJ model is a figiire of merit for the inductive coirpling, and has been used to solve the simrrltaneoris shield insertion and net ordering (SINO) and sim...
SLIP
2003
ACM
13 years 10 months ago
2003
ACM
In this paper, we describe an accurate metric (perimeter-degree) for measuring interconnection complexity and effective use of it for controlling congestion in a multilevel framew...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...