6 search results - page 1 / 2 » Fully parallel on-chip learning hardware neural network for ... |
GLVLSI
1998
IEEE
13 years 9 months ago
1998
IEEE
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
NIPS
1994
13 years 6 months ago
1994
In this paper we present results from the first use of neural networks for real-time control of the high temperature plasma in a tokamak fusion experiment. The tokamak is currentl...
IJCNN
2000
IEEE
13 years 9 months ago
2000
IEEE
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
HASE
1997
IEEE
13 years 9 months ago
1997
IEEE
: The distributed recovery block (DRB) scheme is a widely applicable approach for realizing both hardware and software fault tolerance in real-time distributed and parallel compute...