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» Functional Test Generation for Full Scan Circuits
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DATE
2000
IEEE
121views Hardware» more  DATE 2000»
14 years 3 months ago
Functional Test Generation for Full Scan Circuits
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
Irith Pomeranz, Sudhakar M. Reddy
DATE
2005
IEEE
126views Hardware» more  DATE 2005»
14 years 4 months ago
The Accidental Detection Index as a Fault Ordering Heuristic for Full-Scan Circuits
We investigate a new fault ordering heuristic for test generation in full-scan circuits. The heuristic is referred to as the accidental detection index. It associates a value ADI ...
Irith Pomeranz, Sudhakar M. Reddy
VTS
1995
IEEE
105views Hardware» more  VTS 1995»
14 years 2 months ago
Cyclic stress tests for full scan circuits
To ensure the production of reliable circuits and fully testable unpackaged dies for MCMs burn-in, both dynamic and monitored, remains a feasible option. During this burn-in proce...
Vinay Dabholkar, Sreejit Chakravarty, J. Najm, Jan...
DATE
1999
IEEE
111views Hardware» more  DATE 1999»
14 years 3 months ago
Sequential Circuit Test Generation Using Decision Diagram Models
A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
Jaan Raik, Raimund Ubar
DATE
1998
IEEE
88views Hardware» more  DATE 1998»
14 years 3 months ago
Functional Scan Chain Testing
Functional scan chains are scan chains that have scan paths through a circuit's functional logic and flip-flops. Establishing functional scan paths by test point insertion (T...
Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-...