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VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 5 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
DAC
2005
ACM
14 years 6 months ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...
ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
13 years 10 months ago
Vectorless Analysis of Supply Noise Induced Delay Variation
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
Sanjay Pant, David Blaauw, Vladimir Zolotov, Savit...
JTRES
2010
ACM
13 years 5 months ago
The design of SafeJML, a specification language for SCJ with support for WCET specification
Safety-Critical Java (SCJ) is a dialect of Java that allows programmers to implement safety-critical systems, such as software to control airplanes, medical devices, and nuclear p...
Ghaith Haddad, Faraz Hussain, Gary T. Leavens
ACSD
2006
IEEE
102views Hardware» more  ACSD 2006»
13 years 7 months ago
Models of Computation for Networks on Chip
Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making...
Axel Jantsch