3 search results - page 1 / 1 » Fundamental Data Retention Limits in SRAM Standby Experiment... |
ISQED
2008
IEEE
13 years 11 months ago
2008
IEEE
SRAM leakage power dominates the total power of low duty-cycle applications, e.g., sensor nodes. Accordingly, leakage power reduction during data-retention in SRAM standby is ofte...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract— We study leakage-power reduction in standby random access memories (SRAMs) during data-retention. An SRAM cell requires a minimum critical supply voltage (DRV) above wh...
DAC
2002
ACM
14 years 5 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...