38 search results - page 2 / 8 » Gate sizing with controlled displacement |
ISBI
2008
IEEE
14 years 5 months ago
2008
IEEE
Image registration algorithms provide a displacement field between two images. We consider the problem of estimating accuracy of the calculated displacement field from the input i...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents a technique for glitch power minimization in combinational circuits. The total number of glitches is reduced by replacing some existing gates with functionally...
ISLPED
1995
ACM
13 years 8 months ago
1995
ACM
Abstract: We describe a technique to estimate the energy consumed by speed-independent asynchronous (clockless) control circuits. Because speed-independent circuits are hazard-free...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...