35 search results - page 2 / 7 » Generated DSP Cores for Implementation of an OFDM Communicat... |
VLSISP
1998
13 years 5 months ago
1998
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
CSREAESA
2008
13 years 6 months ago
2008
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
CASES
2007
ACM
13 years 9 months ago
2007
ACM
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
ICASSP
2010
IEEE
13 years 5 months ago
2010
IEEE
The latest communication technologies invariably consist of modules with dynamic behavior. There exists a number of design tools for communication system design with their foundat...