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» Generation of BDDs from hardware algorithm descriptions
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IEEEPACT
2006
IEEE
13 years 11 months ago
Fast, automatic, procedure-level performance tuning
This paper presents an automated performance tuning solution, which partitions a program into a number of tuning sections and finds the best combination of compiler options for e...
Zhelong Pan, Rudolf Eigenmann
NPAR
2006
ACM
13 years 11 months ago
Real-time watercolor illustrations of plants using a blurred depth test
We present techniques to create convincing high-quality watercolor illustrations of plants. Mainly focusing on the real-time rendering, we introduce methods to abstract the visual...
Thomas Luft, Oliver Deussen
VEE
2006
ACM
150views Virtualization» more  VEE 2006»
13 years 11 months ago
Evaluating fragment construction policies for SDT systems
Software Dynamic Translation (SDT) systems have been used for program instrumentation, dynamic optimization, security policy enforcement, intrusion detection, and many other uses....
Jason Hiser, Daniel Williams, Adrian Filipi, Jack ...
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
13 years 7 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang
DAGSTUHL
2010
13 years 7 months ago
CSG Operations of Arbitrary Primitives with Interval Arithmetic and Real-Time Ray Casting
We apply Knoll et al.'s algorithm [9] to interactively ray-cast constructive solid geometry (CSG) objects of arbitrary primitives represented as implicit functions. Whereas m...
Younis Hijazi, Aaron Knoll, Mathias Schott, Andrew...