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ICCAD
1994
IEEE
110views Hardware» more  ICCAD 1994»
13 years 9 months ago
Test pattern generation based on arithmetic operations
Existing built-in self test (BIST) strategies require the use of specialized test pattern generation hardware which introduces signi cant area overhead and performance degradation...
Sanjay Gupta, Janusz Rajski, Jerzy Tyszer
CONSTRAINTS
2007
112views more  CONSTRAINTS 2007»
13 years 5 months ago
Maxx: Test Pattern Optimisation with Local Search Over an Extended Logic
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
Francisco Azevedo
DATE
2006
IEEE
99views Hardware» more  DATE 2006»
13 years 11 months ago
Multiple-fault diagnosis based on single-fault activation and single-output observation
In this paper, we propose a new circuit transformation technique in conjunction with the use of a special diagnostic test pattern, named SO-SLAT pattern, to achieve higher multipl...
Yung-Chieh Lin, Kwang-Ting Cheng
ATS
2009
IEEE
117views Hardware» more  ATS 2009»
14 years 4 days ago
N-distinguishing Tests for Enhanced Defect Diagnosis
Diagnostic ATPG has traditionally been used to generate test patterns that distinguish pairs of modeled faults. In this work, we investigate the use of n-distinguishing test sets,...
Gang Chen, Janusz Rajski, Sudhakar M. Reddy, Irith...
FDTC
2010
Springer
118views Cryptology» more  FDTC 2010»
13 years 3 months ago
Low Cost Built in Self Test for Public Key Crypto Cores
The testability of the cryptographic cores brings in an extra dimension to the process of digital circuits testing
Dusko Karaklajic, Miroslav Knezevic, Ingrid Verbau...