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VLSID
2002
IEEE
95views VLSI» more  VLSID 2002»
14 years 5 months ago
Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS)
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...
Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaud...
PPOPP
2003
ACM
13 years 10 months ago
Using generative design patterns to generate parallel code for a distributed memory environment
A design pattern is a mechanism for encapsulating the knowledge of experienced designers into a re-usable artifact. Parallel design patterns reflect commonly occurring parallel co...
Kai Tan, Duane Szafron, Jonathan Schaeffer, John A...
DSD
2007
IEEE
140views Hardware» more  DSD 2007»
13 years 11 months ago
Pseudo-Random Pattern Generator Design for Column-Matching BIST
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be used in combination with the column-matching based built-in self-test design meth...
Petr Fiser
KBSE
2002
IEEE
13 years 9 months ago
Generative Design Patterns
A design pattern encapsulates the knowledge of object-oriented designers into re-usable artifacts. A design pattern is a descriptive device that fosters software design re-use. Th...
Steve MacDonald, Duane Szafron, Jonathan Schaeffer...
IPPS
2002
IEEE
13 years 9 months ago
Generating Parallel Programs from the Wavefront Design Pattern
Object-oriented programming, design patterns, and frameworks are common techniques that have been used to reduce the complexity of sequential programming. We have applied these te...
John Anvik, Steve MacDonald, Duane Szafron, Jonath...