545 search results - page 4 / 109 » Global Register Partitioning |
PLDI
2006
ACM
14 years 3 days ago
2006
ACM
This paper describes a global progressive register allocator, a register allocator that uses an expressive model of the register allocation problem to quickly find a good allocat...
ASPDAC
2008
ACM
13 years 8 months ago
2008
ACM
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
ITC
1999
IEEE
13 years 10 months ago
1999
IEEE
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
PAMI
2008
13 years 6 months ago
2008
The aim of this paper is to achieve seamless image stitching without producing visual artifact caused by severe intensity discrepancy and structure misalignment, given that the inp...
IPMI
2001
Springer
14 years 7 months ago
2001
Springer