12 search results - page 1 / 3 » Global resource sharing for synthesis of control data flow g... |
DAC
2003
ACM
14 years 5 months ago
2003
ACM
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
ICCD
2005
IEEE
14 years 1 months ago
2005
IEEE
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
EUROMICRO
1998
IEEE
13 years 9 months ago
1998
IEEE
The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
PPOPP
2009
ACM
14 years 5 months ago
2009
ACM
The advent of new parallel architectures has increased the need for parallel optimizing compilers to assist developers in creating efficient code. OpenUH is a state-of-the-art opt...