18 search results - page 3 / 4 » Guidance of Loop Ordering for Reduced Memory Usage in Signal... |
SASP
2009
IEEE
13 years 11 months ago
2009
IEEE
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
MICRO
1994
IEEE
13 years 8 months ago
1994
IEEE
Numerical applications frequently contain nested loop structures that process large arrays of data. The execution of these loop structures often produces memory preference pattern...
CODES
2008
IEEE
13 years 11 months ago
2008
IEEE
Body-area sensor network or BAN-based health monitoring is increasingly becoming a popular alternative to traditional wired bio-monitoring techniques. However, most biomonitoring ...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive computations on large data sets. These data sets get to be ...
CIVR
2007
Springer
13 years 10 months ago
2007
Springer
In this paper, we present a real-time algorithm for 3D object detection in images. Our method relies on the Ullman and Basri [13] theory which claims that the same object under di...