6 search results - page 1 / 2 » Hardware Design and Arithmetic Algorithms for a Variable-Pre... |
ARITH
1995
IEEE
13 years 8 months ago
1995
IEEE
CHES
2009
Springer
14 years 5 months ago
2009
Springer
Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propos...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Translating digital signal processing (DSP) software into its finite-precision hardware implementation is often a timeconsuming task. We describe a new static analysis technique ...
NIXDORF
1992
13 years 9 months ago
1992
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
CEE
2007
13 years 5 months ago
2007
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...