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DATE
2005
IEEE
118views Hardware» more  DATE 2005»
13 years 10 months ago
An Iterative Algorithm for Battery-Aware Task Scheduling on Portable Computing Platforms
In this work we consider battery powered portable systems which either have Field Programmable Gate Arrays (FPGA) or voltage and frequency scalable processors as their main proces...
Jawad Khan, Ranga Vemuri
IJNSEC
2008
106views more  IJNSEC 2008»
13 years 4 months ago
Parallel Hardware Architectures for the Cryptographic Tate Pairing
Identity-based cryptography uses pairing functions,which are sophisticated bilinear maps defined on elliptic curves.Computing pairings efficiently in software is presently a relev...
Guido Marco Bertoni, Luca Breveglieri, Pasqualina ...
ASPDAC
2001
ACM
100views Hardware» more  ASPDAC 2001»
13 years 8 months ago
Low power implementation of a turbo-decoder on programmable architectures
Low Power is an extremely important issue for future mobile radio systems. Channel decoders are essential building blocks of base-band signal processing units in mobile terminal ar...
Frank Gilbert, Alexander Worm, Norbert Wehn
SBACPAD
2003
IEEE
125views Hardware» more  SBACPAD 2003»
13 years 10 months ago
Applying Scheduling by Edge Reversal to Constraint Partitioning
— Scheduling by Edge Reversal (SER) is a fully distributed scheduling mechanism based on the manipulation of acyclic orientations of a graph. This work uses SER to perform constr...
Marluce Rodrigues Pereira, Patrícia Kayser ...