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LCTRTS
2004
Springer
13 years 10 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
ISCA
2011
IEEE
270views Hardware» more  ISCA 2011»
12 years 9 months ago
Sampling + DMR: practical and low-overhead permanent fault detection
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
Shuou Nomura, Matthew D. Sinclair, Chen-Han Ho, Ve...
HPCA
2008
IEEE
14 years 5 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
13 years 11 months ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...
CASES
2003
ACM
13 years 10 months ago
A low-power accelerator for the SPHINX 3 speech recognition system
Accurate real-time speech recognition is not currently possible in the mobile embedded space where the need for natural voice interfaces is clearly important. The continuous natur...
Binu K. Mathew, Al Davis, Zhen Fang