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» Hardware Software Process Migration and RTL Simulation
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FPL
2007
Springer
115views Hardware» more  FPL 2007»
13 years 11 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson
VLSI
2007
Springer
13 years 11 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
FPL
2007
Springer
101views Hardware» more  FPL 2007»
13 years 11 months ago
Formal Modeling of Process Migration
This paper develops a formal model of process migration that describes programs, processes, and the migration of those processes within a migration realm. A migration realm is a g...
Aric D. Blumer, Henning S. Mortveit, Cameron D. Pa...
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 5 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
DAC
2006
ACM
13 years 10 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan