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» Hardware Support for Prescient Instruction Prefetch
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IEEEPACT
2008
IEEE
14 years 5 days ago
Skewed redundancy
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
Gordon B. Bell, Mikko H. Lipasti
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 4 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
VLDB
2005
ACM
180views Database» more  VLDB 2005»
13 years 11 months ago
Cache-conscious Frequent Pattern Mining on a Modern Processor
In this paper, we examine the performance of frequent pattern mining algorithms on a modern processor. A detailed performance study reveals that even the best frequent pattern min...
Amol Ghoting, Gregory Buehrer, Srinivasan Parthasa...