59 search results - page 1 / 12 » Hardware Support for Relaxed Concurrency Control in Transact... |
MICRO
2010
IEEE
12 years 11 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
CAV
2009
Springer
14 years 5 months ago
2009
Springer
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
PODC
2011
ACM
12 years 7 months ago
2011
ACM
Dynamic memory management is a significant source of complexity in the design and implementation of practical concurrent data structures. We study how hardware transactional memo...
ISCA
2008
IEEE
13 years 11 months ago
2008
IEEE
We demonstrate how fine-grained memory protection can be used in support of transactional memory systems: first showing how a software transactional memory system (STM) can be m...