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» Hardware Synthesis for Asynchronous Communications Mechanism...
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CODES
2007
IEEE
14 years 3 days ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
FMICS
2010
Springer
13 years 6 months ago
Model Checking the FlexRay Physical Layer Protocol
Abstract. The FlexRay standard, developed by a cooperation of leading companies in the automotive industry, is a robust communication protocol for distributed components in modern ...
Michael Gerke 0002, Rüdiger Ehlers, Bernd Fin...
CLUSTER
2008
IEEE
13 years 7 months ago
Improving message passing over Ethernet with I/OAT copy offload in Open-MX
Abstract--Open-MX is a new message passing layer implemented on top of the generic Ethernet stack of the Linux kernel. Open-MX works on all Ethernet hardware, but it suffers from e...
Brice Goglin
DAC
2007
ACM
14 years 6 months ago
Layered Switching for Networks on Chip
We present and evaluate a novel switching mechanism called layered switching. Conceptually, the layered switching implements wormhole on top of virtual cut-through switching. To s...
Zhonghai Lu, Ming Liu, Axel Jantsch
ISCAS
2006
IEEE
144views Hardware» more  ISCAS 2006»
13 years 11 months ago
A VLSI spike-driven dynamic synapse which learns only when necessary
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
S. Mitra, Stefano Fusi, Giacomo Indiveri