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ICCD
2004
IEEE
158views Hardware» more  ICCD 2004»
14 years 2 months ago
An Embedded Reconfigurable SIMD DSP with Capability of Dimension-Controllable Vector Processing
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
Liang Han, Jie Chen, Chaoxian Zhou, Ying Li, Xin Z...
ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
14 years 2 months ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...
DATE
2003
IEEE
115views Hardware» more  DATE 2003»
13 years 10 months ago
Control Flow Driven Splitting of Loop Nests at the Source Code Level
This paper presents a novel source code transformation for control flow optimizationcalled loop nest splitting which minimizes the number of executed if-statements in loop nests ...
Heiko Falk, Peter Marwedel
DATE
1998
IEEE
68views Hardware» more  DATE 1998»
13 years 9 months ago
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
We present an approach to process scheduling based on an abstract graph representation which captures both dataflow and the flow of control. Target architectures consist of severa...
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa...
ET
2008
92views more  ET 2008»
13 years 4 months ago
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs
Processor cores embedded in systems-on-a-chip (SoCs) are often deployed in critical computations, and when affected by faults they may produce dramatic effects. When hardware harde...
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa...