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ISCA
2009
IEEE
138views Hardware» more  ISCA 2009»
13 years 11 months ago
Hardware support for WCET analysis of hard real-time multicore systems
Marco Paolieri, Eduardo Quiñones, Francisco...
RTAS
2008
IEEE
13 years 11 months ago
Using Trace Scratchpads to Reduce Execution Times in Predictable Real-Time Architectures
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
Jack Whitham, Neil C. Audsley
ECRTS
2006
IEEE
13 years 10 months ago
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Isabelle Puaut
RTCSA
2009
IEEE
13 years 11 months ago
Branch Target Buffers: WCET Analysis Framework and Timing Predictability
—One step in the verification of hard real-time systems is to determine upper bounds on the worst-case execution times (WCET) of tasks. To obtain tight bounds, a WCET analysis h...
Daniel Grund, Jan Reineke, Gernot Gebhard
ICECCS
2009
IEEE
166views Hardware» more  ICECCS 2009»
13 years 2 months ago
ASIIST: Application Specific I/O Integration Support Tool for Real-Time Bus Architecture Designs
In hard real-time systems such as avionics, computer board level designs are typically customized to meet specific reliability and real time requirements. This paper focuses on co...
Min-Young Nam, Rodolfo Pellizzoni, Lui Sha, Richar...