115 search results - page 22 / 23 » Hardware synthesis from protocol specifications in LOTOS |
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...
HPCA
2011
IEEE
12 years 9 months ago
2011
IEEE
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
ICMCS
2006
IEEE
13 years 11 months ago
2006
IEEE
Radio hardware used for the reception of 802.11b frames is capable of associating a Signal to Silence Ratio (SSR) with each received frame. If a received frame is corrupted, then ...
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
Code optimization and high level synthesis can be posed as constraint satisfaction and optimization problems, such as graph coloring used in register allocation. Graph coloring is...
FPL
2009
Springer
13 years 10 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...