723 search results - page 2 / 145 » Heterogeneous behavioral hierarchy for system level designs |
DAC
2004
ACM
14 years 6 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs)...
CODES
1999
IEEE
13 years 9 months ago
1999
IEEE
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding. The primary objective of the case study is the validation of the SPADE methodology...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
This paper presents a system level design methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. These heterogeneous systems,...