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» HiPEC: High Performance External Virtual Memory Caching
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IPPS
1998
IEEE
13 years 9 months ago
Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication
The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user'...
Hiroshi Tezuka, Francis O'Carroll, Atsushi Hori, Y...
ICS
2005
Tsinghua U.
13 years 10 months ago
A heterogeneously segmented cache architecture for a packet forwarding engine
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
Kaushik Rajan, Ramaswamy Govindarajan
ISCAS
2006
IEEE
142views Hardware» more  ISCAS 2006»
13 years 11 months ago
An efficient texture cache for programmable vertex shaders
Vertex texturing is state-of-the-art functionality of vertex. Thus, traditional texture caches used in RE are not the 3D geometry processor. However, it aggravates the always appli...
Seunghyun Cho, Chang-Hyo Yu, Lee-Sup Kim
VEE
2005
ACM
140views Virtualization» more  VEE 2005»
13 years 11 months ago
Planning for code buffer management in distributed virtual execution environments
Virtual execution environments have become increasingly useful in system implementation, with dynamic translation techniques being an important component for performance-critical ...
Shukang Zhou, Bruce R. Childers, Mary Lou Soffa
RTAS
2010
IEEE
13 years 3 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean