8 search results - page 1 / 2 » Hierarchical computation of 3-D interconnect capacitance usi... |
ASPDAC
2000
ACM
13 years 8 months ago
2000
ACM
ASPDAC
1999
ACM
13 years 9 months ago
1999
ACM
: In VLSI circuits with deep sub-micron, the parasitic capacitance from interconnect is a very important factor determining circuit performances such as power and time-delay. The B...
ICCAD
1993
IEEE
13 years 9 months ago
1993
IEEE
For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchic...
DAC
2004
ACM
14 years 5 months ago
2004
ACM
Capacitance extraction is an important problem that has been extensively studied. This paper presents a significant improvement for the fast multipole accelerated boundary element...
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
With the adoption of ultra regular fabric paradigms for controlling design printability at the 22nm node and beyond, there is an emerging need for a layout-driven, pattern-based p...