85 search results - page 16 / 17 » High Data Rate 8-Bit Crypto Processor |
LCTRTS
2005
Springer
13 years 11 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
DELTA
2006
IEEE
13 years 9 months ago
2006
IEEE
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
CSE
2009
IEEE
14 years 25 days ago
2009
IEEE
Abstract—Today’s wirelessly networked embedded systems underlie a vast array of electronic devices, performing computation, communication, and input/output. A major design goal...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
In this paper, we show the necessity of reconfigurable hardware for data and signal processing in wireless mobile terminals. We first identify the key processing power requirement...
ISCA
2007
IEEE
13 years 6 months ago
2007
IEEE
The center of gravity of computer architecture is moving toward memory systems. Barring breakthrough microarchitectural techniques to move processor performance to higher levels, ...