16 search results - page 2 / 4 » High-Level Power Estimation and Low-Power Design Space Explo... |
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
DAC
1997
ACM
13 years 9 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
FCCM
2011
IEEE
12 years 9 months ago
2011
IEEE
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
ASAP
2008
IEEE
13 years 12 months ago
2008
IEEE
Cooperative MIMO is a new technique that allows disjoint wireless communication nodes (e.g. wireless sensors) to form a virtual antenna array to increase bandwidth, reliability an...
ICMCS
2008
IEEE
13 years 11 months ago
2008
IEEE
The efficient implementation of multimedia algorithms, for the ever increasing complexity of the specifications and the emergence of the new generation of processing platforms c...