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» High-Level Power Modeling of CPLDs and FPGAs
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ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
14 years 1 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
FPL
2008
Springer
125views Hardware» more  FPL 2008»
13 years 6 months ago
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...
Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dud...