5 search results - page 1 / 1 » High-Throughput Asynchronous Pipelines for Fine-Grain Dynami... |
ASYNC
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper introduces several new asynchronous pipeline designs which offer high throughput as well as low latency. The designs target dynamic datapaths, both dualrail as well as ...
ACSD
2005
IEEE
13 years 10 months ago
2005
IEEE
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
Many approaches recently proposed for high-speed asynchronous pipelines are applicable only to linear datapaths. However, real systems typically have non-linearities in their data...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...