15 search results - page 3 / 3 » High-Throughput Data Compressor Designs Using Content Addres... |
HIPEAC
2009
Springer
13 years 9 months ago
2009
Springer
Abstract. Exposing more instruction-level parallelism in out-of-order superscalar processors requires increasing the number of dynamic in-flight instructions. However, large instru...
IWMM
2009
Springer
14 years 6 days ago
2009
Springer
Tracing algorithms visit reachable nodes in a graph and are central to activities such as garbage collection, marshalling etc. Traditional sequential algorithms use a worklist, re...
SP
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we propose BIND (Binding Instructions aNd Data),1 a fine-grained attestation service for securing distributed systems. Code attestation has recently received consi...
EMSOFT
2007
Springer
13 years 11 months ago
2007
Springer
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
NOCS
2007
IEEE
13 years 12 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...