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IPPS
2006
IEEE
13 years 10 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 1 months ago
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhi...
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 1 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
DAC
2008
ACM
14 years 5 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
ECRA
2002
180views more  ECRA 2002»
13 years 4 months ago
vCOM: Electronic commerce in a collaborative virtual world
Existing e-commerce applications on the web provide the users a relatively simple, browser-based interface to access available products. Customers are not provided with the same s...
Xiaojun Shen, T. Radakrishnan, Nicolas D. Georgana...