9 search results - page 1 / 2 » High-performance, cost-effective heterogeneous 3D FPGA archi... |
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
CF
2009
ACM
13 years 11 months ago
2009
ACM
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...
BMCBI
2010
13 years 5 months ago
2010
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...